Description: These are our IC design curriculum outcome, written with Verilog language. It is mainly about the interleave and deinterleave which is based on the IEEE802.3 Protocal. In the deinterleave, there may be some wrong time shift , in fact I didn t pay attention to this ,but actully this is a wrong point,please correct by yourself .
And There are some actual project code, which has value reference
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File list (Check if you may need any files):
reference
.........\7-8.v
.........\cf_interleaver_10_16.acf
.........\cf_interleaver_10_16.c
.........\cf_interleaver_10_16.h
.........\cf_interleaver_10_16.hif
.........\cf_interleaver_10_16.mmf
.........\cf_interleaver_10_16.py
.........\cf_interleaver_10_16.v
.........\cf_interleaver_10_16.vhd
.........\cf_interleaver_10_32.c
.........\cf_interleaver_10_32.h
.........\cf_interleaver_10_32.py
.........\cf_interleaver_10_32.v
.........\cf_interleaver_10_32.vhd
.........\cf_interleaver_10_64.c
.........\cf_interleaver_10_64.h
.........\cf_interleaver_10_64.py
.........\cf_interleaver_10_64.v
.........\cf_interleaver_10_64.vhd
.........\cf_interleaver_10_8.c
.........\cf_interleaver_10_8.h
.........\cf_interleaver_10_8.py
.........\cf_interleaver_10_8.v
.........\cf_interleaver_10_8.vhd
.........\cf_interleaver_11_16.c
.........\cf_interleaver_11_16.h
.........\cf_interleaver_11_16.py
.........\cf_interleaver_11_16.v
.........\cf_interleaver_11_16.vhd
.........\cf_interleaver_11_32.c
.........\cf_interleaver_11_32.h
.........\cf_interleaver_11_32.py
.........\cf_interleaver_11_32.v
.........\cf_interleaver_11_32.vhd
.........\cf_interleaver_11_64.c
.........\cf_interleaver_11_64.h
.........\cf_interleaver_11_64.py
.........\cf_interleaver_11_64.v
.........\cf_interleaver_11_64.vhd
.........\cf_interleaver_11_8.c
.........\cf_interleaver_11_8.h
.........\cf_interleaver_11_8.py
.........\cf_interleaver_11_8.v
.........\cf_interleaver_11_8.vhd
.........\cf_interleaver_12_16.c
.........\cf_interleaver_12_16.h
.........\cf_interleaver_12_16.py
.........\cf_interleaver_12_16.v
.........\cf_interleaver_12_16.vhd
.........\cf_interleaver_12_32.c
.........\cf_interleaver_12_32.h
.........\cf_interleaver_12_32.py
.........\cf_interleaver_12_32.v
.........\cf_interleaver_12_32.vhd
.........\cf_interleaver_12_64.c
.........\cf_interleaver_12_64.h
.........\cf_interleaver_12_64.py
.........\cf_interleaver_12_64.v
.........\cf_interleaver_12_64.vhd
.........\cf_interleaver_12_8.c
.........\cf_interleaver_12_8.h
.........\cf_interleaver_12_8.py
.........\cf_interleaver_12_8.v
.........\cf_interleaver_12_8.vhd
.........\cf_interleaver_6_16.c
.........\cf_interleaver_6_16.h
.........\cf_interleaver_6_16.py
.........\cf_interleaver_6_16.v
.........\cf_interleaver_6_16.vhd
.........\cf_interleaver_6_32.c
.........\cf_interleaver_6_32.h
.........\cf_interleaver_6_32.py
.........\cf_interleaver_6_32.v
.........\cf_interleaver_6_32.vhd
.........\cf_interleaver_6_64.c
.........\cf_interleaver_6_64.h
.........\cf_interleaver_6_64.py
.........\cf_interleaver_6_64.v
.........\cf_interleaver_6_64.vhd
.........\cf_interleaver_6_8.acf
.........\cf_interleaver_6_8.c
.........\cf_interleaver_6_8.edf
.........\cf_interleaver_6_8.ed_
.........\cf_interleaver_6_8.h
.........\cf_interleaver_6_8.hif
.........\cf_interleaver_6_8.mmf
.........\cf_interleaver_6_8.ncf
.........\cf_interleaver_6_8.py
.........\cf_interleaver_6_8.sum
.........\cf_interleaver_6_8.tdf
.........\cf_interleaver_6_8.v
.........\cf_interleaver_6_8.vhd
.........\cf_interleaver_6_8.xdb
.........\cf_interleaver_6_9.edf
.........\cf_interleaver_6_9.ncf
.........\cf_interleaver_6_9.sum
.........\cf_interleaver_6_9.xdb
.........\cf_interleaver_7_10.edf
.........\cf_interleaver_7_10.gdf
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