Description: Implemented on the DE2 board PAL system video input, VGA works on display, including the can. Unlike the spread of the Internet that is now on board!
- [pic_pal_tv] - Pal Signal generation with 8-Bit microco
- [DE2_70_TV] - NIOS II on TV video processing project f
- [DE2_LCM_TV_PAL] - DE2 video
- [usb-blaster] - DE2 USB-BLASTER drivers in WINDOWS XP
- [DE2_TV_PAL] - fpga pal to vga ，writed in verilog
- [PAL_library] - /* * file : PAL_library.c * project : PI
- [FSM] - FSM archive contains three stages of wri
- [ESS_IHM] - LCD verilog code for LCD & It supporting
File list (Check if you may need any files):
DE2_TV_PAL\atom_netlists\DE2_TV.qsf
..........\AUDIO_DAC.v
..........\db\add_sub_lkc.tdf
..........\..\add_sub_mkc.tdf
..........\..\altsyncram_6b31.tdf
..........\..\altsyncram_drg1.tdf
..........\..\altsyncram_h2c1.tdf
..........\..\altsyncram_q0c1.tdf
..........\..\alt_synch_pipe_rdb.tdf
..........\..\alt_synch_pipe_vd8.tdf
..........\..\alt_u_div_p1g.tdf
..........\..\a_gray2bin_kdb.tdf
..........\..\a_graycounter_egc.tdf
..........\..\a_graycounter_fgc.tdf
..........\..\a_graycounter_o96.tdf
..........\..\cmpr_536.tdf
..........\..\cmpr_ldc.tdf
..........\..\cntr_hpf.tdf
..........\..\dcfifo_iep1.tdf
..........\..\DE2_TV.asm.qmsg
..........\..\DE2_TV.cbx.xml
..........\..\DE2_TV.cmp.kpt
..........\..\DE2_TV.cmp.rdb
..........\..\DE2_TV.db_info
..........\..\DE2_TV.DE2_TV0.rtl.mif
..........\..\DE2_TV.eco.cdb
..........\..\DE2_TV.fit.qmsg
..........\..\DE2_TV.hier_info
..........\..\DE2_TV.hif
..........\..\DE2_TV.lpc.html
..........\..\DE2_TV.lpc.rdb
..........\..\DE2_TV.lpc.txt
..........\..\DE2_TV.map.hdb
..........\..\DE2_TV.map.qmsg
..........\..\DE2_TV.pre_map.hdb
..........\..\DE2_TV.rom0_AUDIO_DAC_1ed7bfc5.hdl.mif
..........\..\DE2_TV.rtlv.hdb
..........\..\DE2_TV.rtlv_sg.cdb
..........\..\DE2_TV.rtlv_sg_swap.cdb
..........\..\DE2_TV.sgdiff.cdb
..........\..\DE2_TV.sgdiff.hdb
..........\..\DE2_TV.sld_design_entry.sci
..........\..\DE2_TV.sld_design_entry_dsc.sci
..........\..\DE2_TV.smp_dump.txt
..........\..\DE2_TV.syn_hier_info
..........\..\DE2_TV.tan.qmsg
..........\..\DE2_TV.tis_db_list.ddb
..........\..\DE2_TV_global_asgn_op.abo
..........\..\ded_mult_ob91.tdf
..........\..\dffpipe_b3c.tdf
..........\..\dffpipe_kec.tdf
..........\..\dffpipe_ngh.tdf
..........\..\dffpipe_oe9.tdf
..........\..\dffpipe_pe9.tdf
..........\..\dffpipe_qe9.tdf
..........\..\logic_util_heursitic.dat
..........\..\lpm_divide_d6t.tdf
..........\..\mult_add_4f74.tdf
..........\..\prev_cmp_DE2_TV.asm.qmsg
..........\..\prev_cmp_DE2_TV.fit.qmsg
..........\..\prev_cmp_DE2_TV.map.qmsg
..........\..\prev_cmp_DE2_TV.qmsg
..........\..\prev_cmp_DE2_TV.tan.qmsg
..........\..\shift_taps_k0r.tdf
..........\..\sign_div_unsign_3li.tdf
..........\DE2_TV.asm.rpt
..........\DE2_TV.cdf
..........\DE2_TV.done
..........\DE2_TV.dpf
..........\DE2_TV.fit.rpt
..........\DE2_TV.fit.smsg
..........\DE2_TV.fit.summary
..........\DE2_TV.flow.rpt
..........\DE2_TV.map.rpt
..........\DE2_TV.map.smsg
..........\DE2_TV.map.summary
..........\DE2_TV.pin
..........\DE2_TV.pof
..........\DE2_TV.qpf
..........\DE2_TV.qsf
..........\DE2_TV.qws
..........\DE2_TV.sof
..........\DE2_TV.tan.rpt
..........\DE2_TV.tan.summary
..........\DE2_TV.v
..........\DE2_TV.v.bak
..........\DE2_TV_assignment_defaults.qdf
..........\DIV.v
..........\greybox_tmp\cbx_args.txt
..........\I2C_AV_Config.v
..........\I2C_AV_Config.v.bak
..........\I2C_Controller.v
..........\incremental_db\compiled_partitions\DE2_TV.db_info
..........\..............\...................\DE2_TV.root_partition.map.kpt
..........\..............\README
..........\ITU_656_Decoder.v
..........\Line_Buffer.v
..........\MAC_3.v
..........\PLL.v
..........\PLL_VGA.ppf
Download