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Title: eda-2009 Download
 Description: VHDL 9600 baud serial port receive and transmit modules, two modules can be used alone.
 Downloaders recently: [More information of uploader bingxinsh]
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  • [rs] - RS232 driver receiver - 9600b/s
File list (Check if you may need any files):
eda-2009\uart_rx.vhd
........\uart_tx.vhd.txt
........\fdiv.asm.rpt
........\fdiv.tan.rpt
........\uart_rx.qpf
........\uart_rx.qsf
........\db\uart_rx1.hif
........\..\uart_rx.db_info
........\..\uart_rx.map.qmsg
........\..\uart_rx.fit.qmsg
........\..\uart_rx.rtlv_sg_swap.cdb
........\..\uart_rx.asm.qmsg
........\..\uart_rx1.psp
........\..\uart_rx1.pss
........\..\uart_rx.cbx.xml
........\..\uart_rx.hif
........\..\uart_rx.hier_info
........\..\uart_rx.sim.qmsg
........\..\uart_rx.cmp.logdb
........\..\uart_rx.pre_map.hdb
........\..\uart_rx.smp_dump.txt
........\..\uart_rx2.hif
........\..\uart_rx.psp
........\..\uart_rx.dbp
........\..\uart_rx.pre_map.cdb
........\..\uart_rx.map.logdb
........\..\uart_rx.tan.qmsg
........\..\uart_rx.rtlv.hdb
........\..\uart_rx2.psp
........\..\uart_rx.syn_hier_info
........\..\uart_rx.rtlv_sg.cdb
........\..\uart_rx.sim.hdb
........\..\uart_rx.sim_ori.vwf
........\..\uart_rx.sim.rdb
........\..\uart_rx.sgdiff.cdb
........\..\uart_rx.sgdiff.hdb
........\..\uart_rx.sld_design_entry_dsc.sci
........\..\uart_rx2.dbp
........\..\uart_rx.cmp.kpt
........\..\uart_rx.map.cdb
........\..\uart_rx.map.hdb
........\..\uart_rx.eco.cdb
........\..\uart_rx1.db_info
........\..\fdiv.hif
........\..\uart_rx.cmp.cdb
........\..\uart_rx1.sim.qmsg
........\..\fdiv.psp
........\..\uart_rx.cmp2.ddb
........\..\uart_rx.signalprobe.cdb
........\..\uart_rx.cmp.tdb
........\..\uart_rx.cmp.hdb
........\..\fdiv.dbp
........\..\uart_rx.asm_labs.ddb
........\..\uart_rx.cmp.rdb
........\..\uart_rx.cmp0.ddb
........\..\uart_rx.sld_design_entry.sci
........\..\prev_cmp_uart_rx1.qmsg
........\..\uart_rx1.map.qmsg
........\..\uart_rx1.tis_db_list.ddb
........\..\uart_rx1.cbx.xml
........\..\uart_rx1.hier_info
........\..\uart_rx1.rtlv_sg_swap.cdb
........\..\uart_rx1.dbp
........\..\uart_rx1.sim_ori.vwf
........\..\uart_rx1.pre_map.cdb
........\..\tx1.hif
........\..\uart_rx.eds_overflow
........\..\uart_rx1.pre_map.hdb
........\..\wed.zsf
........\..\uart_rx1.smp_dump.txt
........\..\uart_rx1.map.logdb
........\..\uart_rx1.fit.qmsg
........\..\uart_rx1.cmp.logdb
........\..\uart_rx1.asm.qmsg
........\..\uart_rx1.rtlv_sg.cdb
........\..\uart_rx1.tan.qmsg
........\..\uart_rx1.syn_hier_info
........\..\ram_port2.hif
........\..\tx1.psp
........\..\uart_top1.map.qmsg
........\..\uart_rx1.rtlv.hdb
........\..\uart_rx1.sgdiff.hdb
........\..\uart_rx1.sgdiff.cdb
........\..\uart_rx1.asm_labs.ddb
........\..\prev_cmp_uart_rx1.sim.qmsg
........\..\uart_rx1.map.cdb
........\..\fdiv.db_info
........\..\fdiv.sim.rdb
........\..\fdiv.sim.qmsg
........\..\tx1.dbp
........\..\uart_rx2.db_info
........\..\uart_rx1.sld_design_entry_dsc.sci
........\..\uart_rx1.map.hdb
........\..\uart_rx1.cmp.tdb
........\..\ram_port2.psp
........\..\fdiv16.hif
........\..\uart_rx1.signalprobe.cdb
........\..\uart_rx1.sim.hdb
........\..\uart_rx1.cmp.cdb
........\..\uart_rx1.cmp2.ddb
    

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