FPGA的高速数据采集程序的编写(VHDL语言)\HighSpeedAD\db\hsad.asm.qmsg
......................................\...........\..\hsad.cbx.xml
......................................\...........\..\hsad.cmp.ecobp
......................................\...........\..\hsad.cmp.rdb
......................................\...........\..\hsad.cmp0.ddb
......................................\...........\..\hsad.cmp_bb.cdb
......................................\...........\..\hsad.cmp_bb.hdb
......................................\...........\..\hsad.cmp_bb.logdb
......................................\...........\..\hsad.cmp_bb.rcf
......................................\...........\..\hsad.dbp
......................................\...........\..\hsad.db_info
......................................\...........\..\hsad.eco.cdb
......................................\...........\..\hsad.fit.qmsg
......................................\...........\..\hsad.hier_info
......................................\...........\..\hsad.hif
......................................\...........\..\hsad.map.ecobp
......................................\...........\..\hsad.map.qmsg
......................................\...........\..\hsad.map_bb.logdb
......................................\...........\..\hsad.merge.qmsg
......................................\...........\..\hsad.pre_map.cdb
......................................\...........\..\hsad.pre_map.hdb
......................................\...........\..\hsad.psp
......................................\...........\..\hsad.pss
......................................\...........\..\hsad.rtlv.hdb
......................................\...........\..\hsad.rtlv_sg.cdb
......................................\...........\..\hsad.rtlv_sg_swap.cdb
......................................\...........\..\hsad.sgdiff.cdb
......................................\...........\..\hsad.sgdiff.hdb
......................................\...........\..\hsad.sld_design_entry.sci
......................................\...........\..\hsad.sld_design_entry_dsc.sci
......................................\...........\..\hsad.syn_hier_info
......................................\...........\..\hsad.tan.qmsg
......................................\...........\hsad.asm.rpt
......................................\...........\hsad.done
......................................\...........\hsad.fit.rpt
......................................\...........\hsad.fit.smsg
......................................\...........\hsad.fit.summary
......................................\...........\hsad.flow.rpt
......................................\...........\hsad.map.rpt
......................................\...........\hsad.map.summary
......................................\...........\hsad.merge.rpt
......................................\...........\hsad.pin
......................................\...........\hsad.pof
......................................\...........\hsad.qpf
......................................\...........\hsad.qsf
......................................\...........\hsad.qws
......................................\...........\hsad.sof
......................................\...........\hsad.tan.rpt
......................................\...........\hsad.vhd
......................................\...........\pll50.cmp
......................................\...........\pll50.ppf
......................................\...........\pll50.vhd
......................................\...........\pll50_wave0.jpg
......................................\...........\pll50_waveforms.html
......................................\使用说明请参看右侧注释====〉〉.txt
......................................\HighSpeedAD\db
......................................\HighSpeedAD
FPGA的高速数据采集程序的编写(VHDL语言)