Description: Zhou, who based SOPC experimental development platform, using VHDL language, to achieve DDS FM
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File list (Check if you may need any files):
ep1c12_29_dds\cmp_state.ini
.............\db\dds.db_info
.............\..\dds.eco.cdb
.............\..\dds.sld_design_entry.sci
.............\dds.asm.rpt
.............\dds.bsf
.............\dds.done
.............\dds.fit.eqn
.............\dds.fit.rpt
.............\dds.fit.summary
.............\dds.flow.rpt
.............\dds.map.eqn
.............\dds.map.rpt
.............\dds.map.summary
.............\dds.pin
.............\dds.pof
.............\dds.qpf
.............\dds.qsf
.............\dds.qws
.............\dds.sof
.............\dds.tan.rpt
.............\dds.tan.summary
.............\dds.vhd
.............\dds_assignment_defaults.qdf
.............\dds_rom.bsf
.............\dds_rom.mif
.............\dds_rom.vhd
.............\dds_rom_inst.vhd
.............\dds_test.bsf
.............\dds_test.vhd
.............\dds_top.vhd
.............\pll.bsf
.............\pll.vhd
.............\pll_inst.vhd
.............\db
ep1c12_29_dds
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