key_master_0621 On the 4* 4 matrix keyboard scanni - CodeBus

Welcome！[Sign In] ！[Sign Up]！

Front-page it | Collect it | [中国-简体中文]

FAQ Fav

Location:

Embeded-SCM Develop

VHDL-FPGA-Verilog

Title: key_master_0621

Category:
VHDL-FPGA-Verilog
Tags:
[VHDL] [源码]
File Size:
2kb
Update:
2012-11-26
Downloads:
0 Times
Uploaded by:
xianjuntan

Description: On the 4* 4 matrix keyboard scanning circuit verilog code design, support Avalon bus

Downloaders recently: [More information of uploader xianjuntan]

To Search:

[Hardware_Interface_Implementation_FPGA] - People's Post published the FPGA hardwar
[pwm-c] - VHDL prepared using PWM control procedur
[Altera_FPGA_pwm] - Based on FPGA (ALTERA' s FPGA) PWM te
[wavelet] - Verilog DB8 Wavelet Transform Based on c
[PerfectTiming] - Perfect timing, with two versions in Eng
[FPGA] - FPGA-based modem communication systems,

File list (Check if you may need any files):

key_master_0621.v

CodeBus www.codebus.net

“CodeBus” is the largest source code store in internet!

1999-2018 CodeBus All Rights Reserved.