Welcome！[Sign In] ！[Sign Up]！
Front-page it | Collect it | [中国-简体中文]
FAQ Fav
Location:
Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
Title: PLL.ZIP Download
 Description: the code specifies how to model a pll using vhdl code
 Downloaders recently: [More information of uploader mridula1729]
 To Search:
File list (Check if you may need any files): 
PLL\loop_filter.txt
...\loop_filter1MHz_less_phase.txt
...\loop_filter1MHz_much_phase.txt
...\pll_test.v
...\pll_test.vtakprj
...\preout.v
...\p_temp001.txt
...\trace_file.txt

CodeBus www.codebus.net