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Embeded-SCM Develop
VHDL-FPGA-Verilog
Title:
fpufiles
Download
Category:
Project Design
Tags:
[VHDL]
[源码]
File Size:
19kb
Update:
2012-11-26
Downloads:
0 Times
Uploaded by:
khosro2001
Description:
floating point adder mul and sub in verilog code
Downloaders recently:
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More information of uploader khosro2001
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To Search:
floating point adder in verilog
verilog code for floating point mul
Verilog floating point
[
fpu
] - NIOS embedded system hardware floating-p
[
floatmul
] - Verilog design language used to achieve
[
undistort
] - floating point arthematic function with
[
altera_fft
] - alter the official fft program uses veri
File list
(Check if you may need any files):
primitives.v pre_norm_fmul.v pre_norm.v post_norm.v fpu.v except.v
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