Description: This source package is the AHB bus to Wishbone bus bridge(wrapper).It has the following 4 parts: RTL codes, testbench, software simulating files, help documents.
To Search:
File list (Check if you may need any files):
AHB_to_Wishbone_Verilog\bench\ahb2wb_tb.v
.......................\doc\ahb_doc.doc
.......................\...\ahb_doc.pdf
.......................\...\ahb_doc.sxw
.......................\sim\modelsim.ini
.......................\...\run.mti
.......................\.rc\ahb2wb.v
.......................\bench
.......................\doc
.......................\sim
.......................\src
AHB_to_Wishbone_Verilog