Description: Verilog HDL language used to write a simple processor CPU. Including IR, Control unit, A, Addsub, G, Counter, 8 registers.
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File list (Check if you may need any files):
单模块CPU\CPU.qpf
.........\CPU.qsf
.........\CPU.qws
.........\CPU.v
.........\CPU.v.bak
.........\CPU.vwf
.........\db\add_sub_9ri.tdf
.........\..\CPU.asm.qmsg
.........\..\CPU.asm_labs.ddb
.........\..\CPU.atom.rvd
.........\..\CPU.cbx.xml
.........\..\CPU.cmp.bpm
.........\..\CPU.cmp.cdb
.........\..\CPU.cmp.ecobp
.........\..\CPU.cmp.hdb
.........\..\CPU.cmp.kpt
.........\..\CPU.cmp.logdb
.........\..\CPU.cmp.rdb
.........\..\CPU.cmp.tdb
.........\..\CPU.cmp0.ddb
.........\..\CPU.cmp_merge.kpt
.........\..\CPU.db_info
.........\..\CPU.eco.cdb
.........\..\CPU.eds_overflow
.........\..\CPU.fit.qmsg
.........\..\CPU.fnsim.hdb
.........\..\CPU.fnsim.qmsg
.........\..\CPU.hier_info
.........\..\CPU.hif
.........\..\CPU.lpc.html
.........\..\CPU.lpc.rdb
.........\..\CPU.lpc.txt
.........\..\CPU.map.bpm
.........\..\CPU.map.cdb
.........\..\CPU.map.ecobp
.........\..\CPU.map.hdb
.........\..\CPU.map.kpt
.........\..\CPU.map.logdb
.........\..\CPU.map.qmsg
.........\..\CPU.map_bb.cdb
.........\..\CPU.map_bb.hdb
.........\..\CPU.map_bb.logdb
.........\..\CPU.pre_map.cdb
.........\..\CPU.pre_map.hdb
.........\..\CPU.rpp.qmsg
.........\..\CPU.rtlv.hdb
.........\..\CPU.rtlv_sg.cdb
.........\..\CPU.rtlv_sg_swap.cdb
.........\..\CPU.sgate.rvd
.........\..\CPU.sgate_sm.rvd
.........\..\CPU.sgdiff.cdb
.........\..\CPU.sgdiff.hdb
.........\..\CPU.sim.cvwf
.........\..\CPU.sim.hdb
.........\..\CPU.sim.qmsg
.........\..\CPU.sim.rdb
.........\..\CPU.simfam
.........\..\CPU.sld_design_entry.sci
.........\..\CPU.sld_design_entry_dsc.sci
.........\..\CPU.syn_hier_info
.........\..\CPU.tan.qmsg
.........\..\CPU.tis_db_list.ddb
.........\..\CPU.tmw_info
.........\..\CPU_global_asgn_op.abo
.........\..\mux_3nc.tdf
.........\..\mux_umc.tdf
.........\..\prev_cmp_CPU.asm.qmsg
.........\..\prev_cmp_CPU.fit.qmsg
.........\..\prev_cmp_CPU.map.qmsg
.........\..\prev_cmp_CPU.qmsg
.........\..\prev_cmp_CPU.sim.qmsg
.........\..\prev_cmp_CPU.tan.qmsg
.........\..\wed.wsf
.........\.ebug\CPU.asm.rpt
.........\.....\CPU.done
.........\.....\CPU.fit.rpt
.........\.....\CPU.fit.smsg
.........\.....\CPU.fit.summary
.........\.....\CPU.flow.rpt
.........\.....\CPU.map.rpt
.........\.....\CPU.map.smsg
.........\.....\CPU.map.summary
.........\.....\CPU.pin
.........\.....\CPU.pof
.........\.....\CPU.sim.rpt
.........\.....\CPU.sof
.........\.....\CPU.tan.rpt
.........\.....\CPU.tan.summary
.........\incremental_db\compiled_partitions\CPU.root_partition.cmp.atm
.........\..............\...................\CPU.root_partition.cmp.dfp
.........\..............\...................\CPU.root_partition.cmp.hdbx
.........\..............\...................\CPU.root_partition.cmp.kpt
.........\..............\...................\CPU.root_partition.cmp.logdb
.........\..............\...................\CPU.root_partition.cmp.rcf
.........\..............\...................\CPU.root_partition.map.atm
.........\..............\...................\CPU.root_partition.map.dpi
.........\..............\...................\CPU.root_partition.map.hdbx
.........\..............\...................\CPU.root_partition.map.kpt
.........\..............\README
.........\..............\compiled_partitions
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