Description: Through the two-wire I2C serial bus protocol data SDA and serial clock SCL line is connected to the bus transfer information between devices, each device has a unique address identification, and can be used as a transmitter or receiver.
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File list (Check if you may need any files):
opencores_i2c\class.ptf.old
.............\db
.............\..\i2c_master_top.analyze_file.qmsg
.............\..\i2c_master_top.cbx.xml
.............\..\i2c_master_top.cmp.rdb
.............\..\i2c_master_top.db_info
.............\..\i2c_master_top.eco.cdb
.............\..\i2c_master_top.hier_info
.............\..\i2c_master_top.hif
.............\..\i2c_master_top.map.qmsg
.............\..\i2c_master_top.map_bb.hdb
.............\..\i2c_master_top.map_bb.hdbx
.............\..\i2c_master_top.pre_map.cdb
.............\..\i2c_master_top.pre_map.hdb
.............\..\i2c_master_top.psp
.............\..\i2c_master_top.rpp.qmsg
.............\..\i2c_master_top.rtlv.hdb
.............\..\i2c_master_top.rtlv_sg.cdb
.............\..\i2c_master_top.rtlv_sg_swap.cdb
.............\..\i2c_master_top.sgate.rvd
.............\..\i2c_master_top.sgate_sm.rvd
.............\..\i2c_master_top.sld_design_entry.sci
.............\..\i2c_master_top.sld_design_entry_dsc.sci
.............\..\i2c_master_top.tis_db_list.ddb
.............\..\prev_cmp_i2c_master_top.map.qmsg
.............\..\prev_cmp_i2c_master_top.qmsg
.............\Docs
.............\....\I2C_tests.c
.............\HAL
.............\...\inc
.............\...\...\opencores_i2c.h
.............\...\src
.............\...\...\component.mk
.............\...\...\opencores_i2c.c
.............\i2c_master_bit_ctrl.v
.............\i2c_master_byte_ctrl.v
.............\i2c_master_defines.v
.............\i2c_master_top.done
.............\i2c_master_top.flow.rpt
.............\i2c_master_top.map.rpt
.............\i2c_master_top.map.summary
.............\i2c_master_top.qpf
.............\i2c_master_top.qsf
.............\i2c_master_top.qws
.............\i2c_master_top.v
.............\inc
.............\...\opencores_i2c_regs.h
.............\opencores_i2c.v
.............\opencores_i2c.v~
.............\opencores_i2c_hw.tcl
.............\opencores_i2c_hw.tcl.old
.............\opencores_i2c_hw.tcl~
.............\timescale.v