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Title: caitiao Download
 Description: The use of VHDL, Verilog language to achieve color display of the hardware control system, downloaded to the FPGA board Virtex2Pro experiment, an external display can be equivalent to a simple video card driver, but is a pure hardware implementation
 Downloaders recently: [More information of uploader edenrui]
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File list (Check if you may need any files):
caitiao\.svga.v.swp
.......\.svgatest.v.swp
.......\bb\bb.ise
.......\..\bb.ntrc_log
.......\..\bb.restore
.......\..\.._xdb\cst.xbcd
.......\..\......\tmp\ise\version
.......\..\......\...\...\__OBJSTORE__\HierarchicalDesign\HDProject\HDProject
.......\..\......\...\...\............\..................\.........\HDProject_StrTbl
.......\..\......\...\...\............\PnAutoRun\Scripts\RunOnce_tcl
.......\..\......\...\...\............\.........\.......\RunOnce_tcl_StrTbl
.......\..\......\...\...\............\.rojectNavigator\dpm_project_main\dpm_project_main
.......\..\......\...\...\............\................\................\dpm_project_main_StrTbl
.......\..\......\...\...\............\................\__stored_objects__
.......\..\......\...\...\............\................\__stored_objects___StrTbl
.......\..\......\...\...\............\................\__stored_object_table__
.......\..\......\...\...\............\................Gui\GuiProjectData
.......\..\......\...\...\............\...................\GuiProjectData_StrTbl
.......\..\......\...\...\............\xreport\Gc_RvReportViewer-Current-Module
.......\..\......\...\...\............\.......\Gc_RvReportViewer-Current-Module_StrTbl
.......\..\......\...\...\............\.......\Gc_RvReportViewer-Module-Data-svga
.......\..\......\...\...\............\.......\Gc_RvReportViewer-Module-Data-svga_StrTbl
.......\..\......\...\...\............\.......\Gc_RvReportViewer-Module-DataFactory-Default
.......\..\......\...\...\............\.......\Gc_RvReportViewer-Module-DataFactory-Default_StrTbl
.......\..\......\...\...\..REGISTRY__\Autonym\regkeys
.......\..\......\...\...\............\bitgen\regkeys
.......\..\......\...\...\............\common\regkeys
.......\..\......\...\...\............\.pldfit\regkeys
.......\..\......\...\...\............\Cs\regkeys
.......\..\......\...\...\............\dumpngdio\regkeys
.......\..\......\...\...\............\fuse\regkeys
.......\..\......\...\...\............\HierarchicalDesign\HDProject\regkeys
.......\..\......\...\...\............\..................\regkeys
.......\..\......\...\...\............\hprep6\regkeys
.......\..\......\...\...\............\idem\regkeys
.......\..\......\...\...\............\map\regkeys
.......\..\......\...\...\............\netgen\regkeys
.......\..\......\...\...\............\.gc2edif\regkeys
.......\..\......\...\...\............\...build\regkeys
.......\..\......\...\...\............\..dbuild\regkeys
.......\..\......\...\...\............\par\regkeys
.......\..\......\...\...\............\ProjectNavigator\regkeys
.......\..\......\...\...\............\................Gui\regkeys
.......\..\......\...\...\............\runner\regkeys
.......\..\......\...\...\............\SrcCtrl\regkeys
.......\..\......\...\...\............\.TE\bitgen\regkeys
.......\..\......\...\...\............\...\map\regkeys
.......\..\......\...\...\............\...\ngdbuild\regkeys
.......\..\......\...\...\............\...\par\regkeys
.......\..\......\...\...\............\...\regkeys
.......\..\......\...\...\............\...\trce\regkeys
.......\..\......\...\...\............\taengine\regkeys
.......\..\......\...\...\............\.rce\regkeys
.......\..\......\...\...\............\.sim\regkeys
.......\..\......\...\...\............\vhpcomp\regkeys
.......\..\......\...\...\............\.logcomp\regkeys
.......\..\......\...\...\............\WebTalk\DesignDataCollection\regkeys
.......\..\......\...\...\............\.......\regkeys
.......\..\......\...\...\............\xpwr\regkeys
.......\..\......\...\...\............\.report\regkeys
.......\..\......\...\...\............\XSLTProcess\regkeys
.......\..\......\...\...\............\xst\regkeys
.......\..\......\...\...\............\_ProjRepoInternal_\regkeys
.......\..\......\...\ise.lock
.......\..\device_usage_statistics.html
.......\..\svga.bgn
.......\..\svga.bit
.......\..\svga.bld
.......\..\svga.cmd_log
.......\..\svga.drc
.......\..\svga.edf
.......\..\svga.log
.......\..\svga.ncd
.......\..\svga.ngd
.......\..\svga.pad
.......\..\svga.par
.......\

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