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Title: 97B Download
 Description: This Electronic Design Competition 1997 b problem simple digital frequency meter fpga practice.
 Downloaders recently: [More information of uploader 277954729]
 To Search:
  • [spi_controller] - SPI controller, based on the VERILOG des
  • [Verilog] - Based on Quartus II 9.0 (32-Bit) of the
File list (Check if you may need any files):
01-简易数字频率计(1997年B题)\pinlvji_demo\.untf
..............................\............\automake.log
..............................\............\bitgen.ut
..............................\............\pinlvji_demo.dhp
..............................\............\pinlvji_demo.ise
..............................\............\pinlvji_demo.ise_ISE_Backup
..............................\............\Project.dhp
..............................\............\topdesign.bgn
..............................\............\topdesign.bit
..............................\............\topdesign.bld
..............................\............\topdesign.cmd_log
..............................\............\topdesign.drc
..............................\............\topdesign.lso
..............................\............\topdesign.mrp
..............................\............\topdesign.nc1
..............................\............\topdesign.ncd
..............................\............\topdesign.ngc
..............................\............\topdesign.ngd
..............................\............\topdesign.ngm
..............................\............\topdesign.ngr
..............................\............\topdesign.pad
..............................\............\topdesign.pad_txt
..............................\............\topdesign.par
..............................\............\topdesign.pcf
..............................\............\topdesign.placed_ncd_tracker
..............................\............\topdesign.prj
..............................\............\topdesign.routed_ncd_tracker
..............................\............\topdesign.stx
..............................\............\topdesign.syr
..............................\............\topdesign.twr
..............................\............\topdesign.twx
..............................\............\topdesign.ucf
..............................\............\topdesign.ucf.untf
..............................\............\topdesign.ut
..............................\............\topdesign.v
..............................\............\topdesign.xpi
..............................\............\topdesign_last_par.ncd
..............................\............\topdesign_map.ncd
..............................\............\topdesign_map.ngm
..............................\............\topdesign_pad.csv
..............................\............\topdesign_pad.txt
..............................\............\topdesign_summary.html
..............................\............\topdesign_vhdl.prj
..............................\............\xst\work\hdllib.ref
..............................\............\...\....\vlg09\topdesign.bin
..............................\............\_impact.cmd
..............................\............\_impact.log
..............................\............\.ngo\netlist.lst
..............................\............\._projnav\bitgen.rsp
..............................\............\.........\ednTOngd_tcl.rsp
..............................\............\.........\nc1TOncd_tcl.rsp
..............................\............\.........\pinlvji_demo.gfl
..............................\............\.........\pinlvji_demo_flowplus.gfl
..............................\............\.........\runXst_tcl.rsp
..............................\............\.........\sumrpt_tcl.rsp
..............................\............\.........\topdesign.xst
..............................\............\.........\topdesign_ncdTOut_tcl.rsp
..............................\............\__projnav.log
..............................\readme.txt
..............................\pinlvji_demo\xst\dump.xst\topdesign.prj\ngx\notopt
..............................\............\...\........\.............\...\opt
..............................\............\...\........\.............\ngx
..............................\............\...\........\topdesign.prj
..............................\............\...\work\vlg09
..............................\............\...\dump.xst
..............................\..........

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