实验12 PS2实验\verilog HDL设计的PS2\PS2_v\convert.bsf
..............\....................\.....\convert.v
..............\....................\.....\convert.v.bak
..............\....................\.....\data_scanC.bsf
..............\....................\.....\data_scanC.v
..............\....................\.....\data_scanC.v.bak
..............\....................\.....\.b\PS2.asm.qmsg
..............\....................\.....\..\PS2.asm_labs.ddb
..............\....................\.....\..\PS2.cbx.xml
..............\....................\.....\..\PS2.cmp.cdb
..............\....................\.....\..\PS2.cmp.hdb
..............\....................\.....\..\PS2.cmp.logdb
..............\....................\.....\..\PS2.cmp.rdb
..............\....................\.....\..\PS2.cmp.tdb
..............\....................\.....\..\PS2.cmp0.ddb
..............\....................\.....\..\PS2.cmp2.ddb
..............\....................\.....\..\PS2.dbp
..............\....................\.....\..\PS2.db_info
..............\....................\.....\..\PS2.eco.cdb
..............\....................\.....\..\PS2.fit.qmsg
..............\....................\.....\..\PS2.hier_info
..............\....................\.....\..\PS2.hif
..............\....................\.....\..\PS2.map.cdb
..............\....................\.....\..\PS2.map.hdb
..............\....................\.....\..\PS2.map.logdb
..............\....................\.....\..\PS2.map.qmsg
..............\....................\.....\..\PS2.pre_map.cdb
..............\....................\.....\..\PS2.pre_map.hdb
..............\....................\.....\..\PS2.psp
..............\....................\.....\..\PS2.pss
..............\....................\.....\..\PS2.rtlv.hdb
..............\....................\.....\..\PS2.rtlv_sg.cdb
..............\....................\.....\..\PS2.rtlv_sg_swap.cdb
..............\....................\.....\..\PS2.sgdiff.cdb
..............\....................\.....\..\PS2.sgdiff.hdb
..............\....................\.....\..\PS2.signalprobe.cdb
..............\....................\.....\..\PS2.sld_design_entry.sci
..............\....................\.....\..\PS2.sld_design_entry_dsc.sci
..............\....................\.....\..\PS2.syn_hier_info
..............\....................\.....\..\PS2.tan.qmsg
..............\....................\.....\..\PS2.tis_db_list.ddb
..............\....................\.....\PS2.asm.rpt
..............\....................\.....\PS2.bdf
..............\....................\.....\PS2.cdf
..............\....................\.....\PS2.done
..............\....................\.....\PS2.fit.eqn
..............\....................\.....\PS2.fit.rpt
..............\....................\.....\PS2.fit.smsg
..............\....................\.....\PS2.fit.summary
..............\....................\.....\PS2.flow.rpt
..............\....................\.....\PS2.map.eqn
..............\....................\.....\PS2.map.rpt
..............\....................\.....\PS2.map.smsg
..............\....................\.....\PS2.map.summary
..............\....................\.....\PS2.pin
..............\....................\.....\PS2.pof
..............\....................\.....\PS2.qpf
..............\....................\.....\PS2.qsf
..............\....................\.....\PS2.sof
..............\....................\.....\PS2.tan.rpt
..............\....................\.....\PS2.tan.summary
..............\....................\.....\PS2_assignment_defaults.qdf
..............\....................\.....\PS2时序文档.pdf
..............\....................\.....\segmain.bsf
..............\....................\.....\segmain.v
..............\....................\.....\segmain.v.bak
..............\....................\.....\setup.tcl
..............\VHDL设计的PS2\PS2\bin27seg.bsf
..............\.............\...\bin27seg.vhd
..............\.............\...\convert.bsf
..............\.............\...\convert.vhd
..............\.............\...\data_scanC.bsf
..............\.............\...\data_scanC.vhd
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