Description: verilog hdl achieve 5B6B encoding and decoding (code-based fiber-optic communication lines), contains a clock generator module, signal source modules, code modules, decoding module, and error detection module, and through modesim simulation.
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5B6B编译码\check_error.v
..........\clk_generate.v
..........\coder.v
..........\encoder.v
..........\fiveB_sixB_encoder.v
..........\signal_source.v
..........\test.v
5B6B编译码
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