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Title: cpu Download
 Description: A simple CPU design, support add, sub, mvi, mv four instructions, with the Verilog language, compiled by the Quratus II, the simulation is correct.
 Downloaders recently: [More information of uploader 178013908]
File list (Check if you may need any files):
cpu\AddSub.v
...\AddSub.v.bak
...\ccounter.v
...\ccounter.v.bak
...\Controlunit.v
...\Controlunit.v.bak
...\Counter.v
...\Counter.v.bak
...\cpu.asm.rpt
...\cpu.done
...\cpu.dpf
...\cpu.fit.rpt
...\cpu.fit.smsg
...\cpu.fit.summary
...\cpu.flow.rpt
...\cpu.map.rpt
...\cpu.map.smsg
...\cpu.map.summary
...\cpu.pin
...\cpu.pof
...\cpu.qpf
...\cpu.qsf
...\cpu.qws
...\cpu.sim.rpt
...\cpu.sof
...\cpu.tan.rpt
...\cpu.tan.summary
...\cpu.v
...\cpu.v.bak
...\cpu.vwf
...\cpu_assignment_defaults.qdf
...\db\altsyncram_0091.tdf
...\..\altsyncram_tq71.tdf
...\..\cpu.asm.qmsg
...\..\cpu.cbx.xml
...\..\cpu.cmp.ecobp
...\..\cpu.cmp.kpt
...\..\cpu.cmp.rdb
...\..\cpu.cmp0.ddb
...\..\cpu.cmp_merge.kpt
...\..\cpu.db_info
...\..\cpu.eco.cdb
...\..\cpu.eds_overflow
...\..\cpu.fit.qmsg
...\..\cpu.fnsim.cdb
...\..\cpu.fnsim.hdb
...\..\cpu.fnsim.qmsg
...\..\cpu.hier_info
...\..\cpu.hif
...\..\cpu.lpc.html
...\..\cpu.lpc.rdb
...\..\cpu.lpc.txt
...\..\cpu.map.bpm
...\..\cpu.map.cdb
...\..\cpu.map.ecobp
...\..\cpu.map.hdb
...\..\cpu.map.kpt
...\..\cpu.map.logdb
...\..\cpu.map.qmsg
...\..\cpu.map_bb.cdb
...\..\cpu.map_bb.hdb
...\..\cpu.map_bb.logdb
...\..\cpu.pre_map.cdb
...\..\cpu.pre_map.hdb
...\..\cpu.rtlv.hdb
...\..\cpu.rtlv_sg.cdb
...\..\cpu.rtlv_sg_swap.cdb
...\..\cpu.sgdiff.cdb
...\..\cpu.sgdiff.hdb
...\..\cpu.sim.cvwf
...\..\cpu.sim.hdb
...\..\cpu.sim.qmsg
...\..\cpu.sim.rdb
...\..\cpu.simfam
...\..\cpu.sld_design_entry.sci
...\..\cpu.sld_design_entry_dsc.sci
...\..\cpu.syn_hier_info
...\..\cpu.tan.qmsg
...\..\cpu.tis_db_list.ddb
...\..\cpu_global_asgn_op.abo
...\..\mux_umc.tdf
...\..\prev_cmp_cpu.asm.qmsg
...\..\prev_cmp_cpu.fit.qmsg
...\..\prev_cmp_cpu.map.qmsg
...\..\prev_cmp_cpu.qmsg
...\..\prev_cmp_cpu.sim.qmsg
...\..\prev_cmp_cpu.tan.qmsg
...\..\Waveform1.sim.cvwf
...\..\wed.wsf
...\incremental_db\compiled_partitions\cpu.root_partition.cmp.atm
...\..............\...................\cpu.root_partition.cmp.dfp
...\..............\...................\cpu.root_partition.cmp.hdbx
...\..............\...................\cpu.root_partition.cmp.kpt
...\..............\...................\cpu.root_partition.cmp.logdb
...\..............\...................\cpu.root_partition.cmp.rcf
...\..............\...................\cpu.root_partition.map.atm
...\..............\...................\cpu.root_partition.map.dpi
...\..............\...................\cpu.root_partition.map.hdbx
...\..............\...................\cpu.root_partition.map.kpt
...\..............\README
    

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