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Title: Verilog-HDL.RAR Download
 Description: vhdl langue
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采用Verilog HDL语言编写的数字频率计\VerilogHDL_counter\counter\cmp_state.ini
...................................\..................\.......\counter.asm.rpt
...................................\..................\.......\counter.bsf
...................................\..................\.......\counter.done
...................................\..................\.......\counter.fit.eqn
...................................\..................\.......\counter.fit.rpt
...................................\..................\.......\counter.fit.summary
...................................\..................\.......\counter.flow.rpt
...................................\..................\.......\counter.map.eqn
...................................\..................\.......\counter.map.rpt
...................................\..................\.......\counter.map.summary
...................................\..................\.......\counter.pin
...................................\..................\.......\counter.pof
...................................\..................\.......\counter.qpf
...................................\..................\.......\counter.qsf
...................................\..................\.......\counter.qws
...................................\..................\.......\counter.sim.rpt
...................................\..................\.......\counter.tan.rpt
...................................\..................\.......\counter.tan.summary
...................................\..................\.......\counter.v
...................................\..................\.......\counter.vwf
...................................\..................\.......\counter10.v
...................................\..................\.......\db\counter.asm.qmsg
...................................\..................\.......\..\counter.cmp.cdb
...................................\..................\.......\..\counter.cmp.ddb
...................................\..................\.......\..\counter.cmp.hdb
...................................\..................\.......\..\counter.cmp.rdb
...................................\..................\.......\..\counter.cmp.tdb
...................................\..................\.......\..\counter.cmp0.ddb
...................................\..................\.......\..\counter.db_info
...................................\..................\.......\..\counter.eco.cdb
...................................\..................\.......\..\counter.eds_overflow
...................................\..................\.......\..\counter.fit.qmsg
...................................\..................\.......\..\counter.hier_info
...................................\..................\.......\..\counter.hif
...................................\..................\.......\..\counter.map.cdb
...................................\..................\.......\..\counter.map.hdb
...................................\..................\.......\..\counter.map.qmsg
...................................\..................\.......\..\counter.pre_map.cdb
...................................\..................\.......\..\counter.pre_map.hdb
...................................\..................\.......\..\counter.psp
...................................\..................\.......\..\counter.rtlv.hdb
...................................\..................\.......\..\counter.rtlv_sg.cdb
...................................\..................\.......\..\counter.rtlv_sg_swap.cdb
...................................\..................\.......\..\counter.sgdiff.cdb
...................................\..................\.......\..\counter.sgdiff.hdb
...................................\..................\.......\..\counter.sim.hdb
...................................\..................\.......\..\counter.sim.qmsg
...................................\..................\.......\..\counter.sim.rdb
...................................\..................\.......\..\counter.sim.vwf
...................................\..................\.....

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