Welcome![Sign In][Sign Up]
Location:
Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
Title: pli_socket_example_pc Download
 Description: co-verification using TCP/IP socket (hardware model : verilog+ vpi as server) (software as a client)
 To Search: pli_socket_example_pc
File list (Check if you may need any files):
include
.......\socketUtil.h
.......\com_exp.h
.......\com_exp.h~
pli
...\Makefile
...\dispargs
...\........\Makefile
...\........\README
...\........\dispargs.c
...\........\run.vc
...\........\test.v
...\........\test1.vc
...\........\test2.vc
util
....\socket
....\......\Makefile
....\......\socketUtil.c
....\......\socketUtil.h
....\......\README
....\Makefile
vpi
...\remmodel
...\........\Makefile
...\........\test.v
...\........\run.vc
...\........\remmodel.c
...\........\modelMain.c
...\........\runModel.c
...\........\README
...\........\runModel.h
...\........\vlogmodel.c
...\dispargs
...\........\Makefile
...\........\README
...\........\dispargs.c
...\........\run.vc
...\........\test.v
...\........\.so
...\........\test1.vc
...\........\test2.vc
...\Makefile
Makefile
Makefile.hppa
Makefile.linux
Makefile.sun4v
Makefile.winnt
README
README_FIRST
    

CodeBus www.codebus.net