简易频谱分析FPGA程序\整理后的MSP430和FPGA通信模块只含sin\430文件夹\inteface\Backup of interface.ewd
....................\...................................\.........\........\Backup of interface.ewp
....................\...................................\.........\........\Debug\Exe\interface.d43
....................\...................................\.........\........\.....\Obj\interface.pbd
....................\...................................\.........\........\.....\...\main.r43
....................\...................................\.........\........\interface.dep
....................\...................................\.........\........\interface.ewd
....................\...................................\.........\........\interface.ewp
....................\...................................\.........\........\interface.eww
....................\...................................\.........\........\main.c
....................\...................................\.........\........\settings\interface.cspy.bat
....................\...................................\.........\........\........\interface.dbgdt
....................\...................................\.........\........\........\interface.dni
....................\...................................\.........\........\........\interface.wsdt
....................\...................................\.........\inteface.rar
....................\...................................\FPGA与MSP430双端通信时序协议.doc
....................\...................................\McuCommunication\aa.bsf
....................\...................................\................\ADDER32B.bsf
....................\...................................\................\adder32b.vhd
....................\...................................\................\ADDR_DFF.bsf
....................\...................................\................\ADDR_DFF.inc
....................\...................................\................\ADDR_DFF.qip
....................\...................................\................\ADDR_DFF.vhd
....................\...................................\................\control.bsf
....................\...................................\................\control.vhd
....................\...................................\................\control.vhd.bak
....................\...................................\................\counter0.bsf
....................\...................................\................\counter0.inc
....................\...................................\................\counter0.qip
....................\...................................\................\counter0.vhd
....................\...................................\................\counter0_wave0.jpg
....................\...................................\................\counter0_waveforms.html
....................\...................................\................\DAC902.pdf
....................\...................................\................\db\accum_kfe.tdf
....................\...................................\................\..\add_sub_plh.tdf
....................\...................................\................\..\altsyncram_05p3.tdf
....................\...................................\................\..\altsyncram_0eq1.tdf
....................\...................................\................\..\altsyncram_0qs3.tdf
....................\...................................\................\..\altsyncram_15p3.tdf
....................\...................................\................\..\altsyncram_1eq1.tdf
....................\...................................\................\..\altsyncram_1ps3.tdf
....................\...................................\................\..\altsyncram_1qs3.tdf
....................\...................................\................\..\altsyncram_25p3.tdf
....................\...................................\................\..\altsyncram_2ap3.tdf
....................\.................