Description: Where start is the start signal, the rising edge of start control unit CLK is a working clock CtrlAddr is to read the control word address CtrlData is to read the control word Reading is a reading of the signal EOP is a sampling completion signal of this AD, only When the AD1 and AD2 are completed only after the EOP is high EN is the enable signal to start the divider, the address generator N is the frequency factor Addr1 and Addr2 AD1 and AD2 are the starting address of data storage NUM1 and NUM2 sampling points, respectively. Control word frequency factor, respectively, 2, AD1 starting address is 1, sampling point 5, AD2 start address is 3, the sampling points to 4.
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File list (Check if you may need any files):
Addr_Generator.v
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