Description: FIFO is a FIFO buffer, which is a synchronous FIFO in VHDL source code, will be divided into several modules FIFO design, top-level files Finally, the modular design.
To Search:
- [FPGA_key] - This program is prepared based on the VE
File list (Check if you may need any files):
fifo\fifo_64_s.vhd
....\fifo64.vhd
....\graycounter.vhd
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