Description: The OpenCores simple Serial Peripheral Interface core is an enhanced version of the
Serial Peripheral Interface found on Motorola s M68HC11 family of CPUs. The Serial
Peripheral Interface is a serial, synchronous communication protocol that requires a
minimum of 3 wires. Enhancements to the original interface include a wider
supported operating frequency range, 4 entries deep read and write FIFOs, and
programmable transfer count dependent interrupt generation. The high compatibility
with the M68HC11 SPI port ensures that existing software can use this core without
major modifications. New software can use existing examples as a starting point.
The core features an 8 bit wishbone interface.
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File list (Check if you may need any files):
SPI\fifo4.v
...\rsacypher.vhd
...\simple_spi.pdf
...\simple_spi_top.v
SPI
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