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Title: wave Download
 Description: FPGA DDR2SDRAM
 Downloaders recently: [More information of uploader zhangyanfang]
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wave\wave_gen\coregen_xil_3960_37.cgc
....\........\coregen_xil_3960_37.cgp
....\........\DCM.tfi
....\........\DCM.v
....\........\DCM_arwz.ucf
....\........\fuse.log
....\........\ipcore_dir\blk_mem_gen_ds512.pdf
....\........\..........\blk_mem_gen_readme.txt
....\........\..........\DCM.v
....\........\..........\DCM.xaw
....\........\..........\DCM_arwz.ucf
....\........\..........\DCM_flist.txt
....\........\..........\DCM_readme.txt
....\........\..........\DCM_xmdf.tcl
....\........\..........\rom.asy
....\........\..........\rom.gise
....\........\..........\rom.mif
....\........\..........\rom.ncf
....\........\..........\rom.ngc
....\........\..........\rom.sym
....\........\..........\rom.v
....\........\..........\rom.veo
....\........\..........\rom.vhd
....\........\..........\rom.vho
....\........\..........\rom.xco
....\........\..........\rom.xise
....\........\..........\rom_flist.txt
....\........\..........\rom_xmdf.tcl
....\........\..........\xaw2verilog.log
....\........\..........\_xmsgs\ngcbuild.xmsgs
....\........\..........\......\pn_parser.xmsgs
....\........\..........\......\xst.xmsgs
....\........\.seconfig\wave_gen.projectmgr
....\........\.........\wave_gen.xreport
....\........\..im\work\@d@c@m.sdb
....\........\....\....\glbl.sdb
....\........\....\....\rom.sdb
....\........\....\....\test.sdb
....\........\....\....\wave_gen.sdb
....\........\rom.coe
....\........\rom.mif
....\........\test.v
....\........\test_beh.prj
....\........\wave_gen.cmd_log
....\........\wave_gen.gise
....\........\wave_gen.lso
....\........\wave_gen.ngc
....\........\wave_gen.ngr
....\........\wave_gen.prj
....\........\wave_gen.stx
....\........\wave_gen.syr
....\........\wave_gen.v
....\........\wave_gen.xise
....\........\wave_gen.xst
....\........\wave_gen_envsettings.html
....\........\wave_gen_summary.html
....\........\wave_gen_xst.xrpt
....\........\webtalk_pn.xml
....\........\xaw2verilog.log
....\........\xilinxsim.ini
....\........\.st\work\hdllib.ref
....\........\...\....\vlg30\wave__gen.bin
....\........\...\....\....A\rom.bin
....\........\...\....\...40\_d_c_m.bin
....\........\_xmsgs\pn_parser.xmsgs
....\........\......\xst.xmsgs
....\........\xst\dump.xst\wave_gen.prj\ngx\notopt
....\........\...\........\............\...\opt
....\........\...\........\............\ngx
....\........\ipcore_dir\tmp\_cg
....\........\xst\dump.xst\wave_gen.prj
....\........\...\work\vlg30
....\........\...\....\vlg3A
....\........\...\....\vlg40
....\........\ipcore_dir\tmp
....\........\..........\xlnx_auto_0_xdb
....\........\..........\_xmsgs
....\........\.sim\work
....\........\xst\dump.xst
....\........\...\projnav.tmp
....\........\...\work
....\........\ipcore_dir
....\........\iseconfig
....\........\isim
....\........\xst
....\........\_xmsgs
....\wave_gen
wave
    

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