Description: SpaceWire compile a complete verification of decoder, VHDL source code,
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File list (Check if you may need any files):
SpW201009
.........\bench
.........\.....\vhdl
.........\.....\....\spwlink_tb_all.vhd
.........\.....\....\streamtest_tb.vhd
.........\.....\....\spwlink_tb.vhd
.........\GPL-2.txt
.........\LGPL-2.1.txt
.........\sim
.........\...\ghdl
.........\...\....\Makefile
.........\syn
.........\...\streamtest_gr-xc3s1500
.........\...\......................\Makefile
.........\...\......................\streamtest_top.vhd
.........\...\......................\streamtest.ucf
.........\...\streamtest_digilent-xc3s200
.........\...\...........................\streamtest.xise
.........\...\...........................\Makefile
.........\...\...........................\streamtest_top.vhd
.........\...\...........................\streamtest.ucf
.........\...\spwstream_gr-xc3s1500
.........\...\.....................\spwstream_top.vhd
.........\...\.....................\Makefile
.........\...\.....................\spwstream.ucf
.........\rtl
.........\...\vhdl
.........\...\....\streamtest.vhd
.........\...\....\spwrecv.vhd
.........\...\....\spwxmit_fast.vhd
.........\...\....\spwrecvfront_fast.vhd
.........\...\....\spwrecvfront_generic.vhd
.........\...\....\spwstream.vhd
.........\...\....\spwram.vhd
.........\...\....\spwlink.vhd
.........\...\....\spwxmit.vhd
.........\...\....\spwpkg.vhd
.........\doc
.........\...\Manual.odt
.........\...\timing_diagram.py
.........\...\spacewirelight.svg
.........\...\Manual.pdf
.........\README.txt