Welcome![Sign In][Sign Up]
Location:
Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
Title: Reflex Download
 Description: This simple program tests the reflex of a person. It will randomly start a timer and after some seconds the person will be told to press a certain button. The CPLD or FPGA will know with a resolution of 1mS the time elapsed time between the command and the pressing of the button, thus measuring the person s reflexes.
 To Search:
File list (Check if you may need any files):
Reflex.vhd
ContadorN.vhd
CHRONOS.vhd
    

CodeBus www.codebus.net