Welcome![Sign In][Sign Up]
Location:
Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
Title: digital-clock Download
 Description: VHDL language digital clock design, FPGA for digital clock design
 Downloaders recently: [More information of uploader liying8268]
 To Search:
File list (Check if you may need any files):
数字时钟\简易数字时钟.doc
........\数字时钟\clock.asm.rpt
........\........\clock.cdf
........\........\clock.done
........\........\clock.dpf
........\........\clock.fit.rpt
........\........\clock.fit.smsg
........\........\clock.fit.summary
........\........\clock.flow.rpt
........\........\clock.map.rpt
........\........\clock.map.summary
........\........\clock.pin
........\........\clock.pof
........\........\clock.qpf
........\........\clock.qsf
........\........\clock.qws
........\........\clock.sof
........\........\clock.tan.rpt
........\........\clock.tan.summary
........\........\clock.v
........\........\clock.v.bak
........\........\clock_assignment_defaults.qdf
........\........\prev_cmp_clock.qmsg
........\........\incremental_db\README
........\........\..............\compiled_partitions\clock.root_partition.cmp.atm
........\........\..............\...................\clock.root_partition.cmp.dfp
........\........\..............\...................\clock.root_partition.cmp.hdbx
........\........\..............\...................\clock.root_partition.cmp.kpt
........\........\..............\...................\clock.root_partition.cmp.rcf
........\........\..............\...................\clock.root_partition.map.atm
........\........\..............\...................\clock.root_partition.map.dpi
........\........\..............\...................\clock.root_partition.map.hdbx
........\........\..............\...................\clock.root_partition.map.kpt
........\........\db\clock.asm.qmsg
........\........\..\clock.asm_labs.ddb
........\........\..\clock.cbx.xml
........\........\..\clock.cmp.bpm
........\........\..\clock.cmp.cdb
........\........\..\clock.cmp.ecobp
........\........\..\clock.cmp.hdb
........\........\..\clock.cmp.kpt
........\........\..\clock.cmp.rdb
........\........\..\clock.cmp.tdb
........\........\..\clock.cmp0.ddb
........\........\..\clock.cmp2.ddb
........\........\..\clock.cmp_merge.kpt
........\........\..\clock.db_info
........\........\..\clock.eco.cdb
........\........\..\clock.fit.qmsg
........\........\..\clock.hier_info
........\........\..\clock.hif
........\........\..\clock.map.bpm
........\........\..\clock.map.cdb
........\........\..\clock.map.ecobp
........\........\..\clock.map.hdb
........\........\..\clock.map.kpt
........\........\..\clock.map.qmsg
........\........\..\clock.map_bb.cdb
........\........\..\clock.map_bb.hdb
........\........\..\clock.map_bb.hdbx
........\........\..\clock.pre_map.cdb
........\........\..\clock.pre_map.hdb
........\........\..\clock.psp
........\........\..\clock.rtlv.hdb
........\........\..\clock.rtlv_sg.cdb
........\........\..\clock.rtlv_sg_swap.cdb
........\........\..\clock.sgdiff.cdb
........\........\..\clock.sgdiff.hdb
........\........\..\clock.sld_design_entry.sci
........\........\..\clock.sld_design_entry_dsc.sci
........\........\..\clock.syn_hier_info
........\........\..\clock.tan.qmsg
........\........\..\clock.tis_db_list.ddb
........\........\..\prev_cmp_clock.asm.qmsg
........\........\..\prev_cmp_clock.fit.qmsg
........\........\..\prev_cmp_clock.map.qmsg
........\........\..\prev_cmp_clock.qmsg
........\........\..\prev_cmp_clock.tan.qmsg
........\........\incremental_db\compiled_partitions
........\........\incremental_db
........\........\db
........\数字时钟
数字时钟
    

CodeBus www.codebus.net