Description: FPGA-based DDS signal generator, sine wave generation on the FPGA, used isp agreement, the sin function rom generator, I hope
These can help you!
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File list (Check if you may need any files):
dds_zhang
.........\coregen_lock
.........\cs_analyzer.ini
.........\cs_analyzer.log
.........\dds3.ise
.........\dds3.ntrc_log
.........\dds3.restore
.........\dds3_ise10migration.zip
.........\dds3_xdb
.........\........\cst.xbcd
.........\........\tmp
.........\........\...\ise
.........\........\...\ise.lock
.........\........\...\...\version
.........\........\...\...\__OBJSTORE__
.........\........\...\...\............\Autonym
.........\........\...\...\............\common
.........\........\...\...\............\ExpandedNetlistEngine
.........\........\...\...\............\HierarchicalDesign
.........\........\...\...\............\..................\HDProject
.........\........\...\...\............\..................\.........\HDProject
.........\........\...\...\............\..................\.........\HDProject_StrTbl
.........\........\...\...\............\..................\__stored_object_table__
.........\........\...\...\............\PnAutoRun
.........\........\...\...\............\.........\Scripts
.........\........\...\...\............\.........\.......\RunOnce_tcl
.........\........\...\...\............\.........\.......\RunOnce_tcl_StrTbl
.........\........\...\...\............\ProjectNavigator
.........\........\...\...\............\ProjectNavigatorGui
.........\........\...\...\............\...................\GuiProjectData
.........\........\...\...\............\...................\GuiProjectData_StrTbl
.........\........\...\...\............\................\dpm_project_main
.........\........\...\...\............\................\................\dpm_project_main
.........\........\...\...\............\................\................\dpm_project_main_StrTbl
.........\........\...\...\............\................\................\NameMap
.........\........\...\...\............\................\................\NameMap_StrTbl
.........\........\...\...\............\................\__stored_objects__
.........\........\...\...\............\................\__stored_objects___StrTbl
.........\........\...\...\............\................\__stored_object_table__
.........\........\...\...\............\SrcCtrl
.........\........\...\...\............\.......\SavedOptions
.........\........\...\...\............\STE
.........\........\...\...\............\WebTalk
.........\........\...\...\............\xreport
.........\........\...\...\............\.......\Gc_RvReportViewer-Current-Module
.........\........\...\...\............\.......\Gc_RvReportViewer-Current-Module_StrTbl
.........\........\...\...\............\.......\Gc_RvReportViewer-Module-Data-sin_signal_generator
.........\........\...\...\............\.......\Gc_RvReportViewer-Module-Data-sin_signal_generator_StrTbl
.........\........\...\...\............\.......\Gc_RvReportViewer-Module-DataFactory-Default
.........\........\...\...\............\.......\Gc_RvReportViewer-Module-DataFactory-Default_StrTbl
.........\........\...\...\............\_ProjRepoInternal_
.........\........\...\...\__REGISTRY__
.........\........\...\...\............\Autonym
.........\........\...\...\............\.......\regkeys
.........\........\...\...\............\bitgen
.........\........\...\...\............\......\regkeys
.........\........\...\...\............\common
.........\........\...\...\............\......\regkeys
.........\........\...\...\............\cpldfit
.........\........\...\...\............\.......\regkeys
.........\........\...\...\............\Cs
.........\........\...\...\............\..\regkeys
.........\........\...\...\............\dumpngdio
.........\........\...\...\............\.........\regkeys
.........\........\...\...\............\ExpandedNetlistEngine
.........\........\...\...\............\.....................\regkeys
.........\........\...\...\............\fuse
.........\........\...\...\............\....\regkeys
.........\........\...\...\............\HierarchicalDesign
.........\........\...\...\............\..................\HDProject
.........\........\...\...\............\..................\.........\regkeys
.......
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