Welcome！[Sign In] ！[Sign Up]！
Front-page it | Collect it | [中国-简体中文]
FAQ Fav
Location:
Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
Title: FileRecv Download
 Description: Convolutional code introduced the paper, as well as the Matlab code
 Downloaders recently: [More information of uploader 122695124]
 To Search:
File list (Check if you may need any files): 
卷积编码器的设计与实现.pdf
卷积码编码器和Viterbi译码器的FPGA实现.pdf
通信系统中卷积码编码器的VHDL实现[1].pdf
_2_1_7_卷积编码及其维特比译码算法的软件实现.pdf

CodeBus www.codebus.net