Welcome![Sign In][Sign Up]
Location:
Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
Title: BCD-counter Download
 Description: A 2-bit BCD code decimal adder counter circuit input as the clock signal CLK, a carry input signal CIN, D, C, B, A, and the carry output signal COUT, each BCD code decimal adder counter' s output signal, the input clock signal CLK Fixed clock, binary input signal CIN.
 Downloaders recently: [More information of uploader victor]
 To Search:
File list (Check if you may need any files):
 

BCD counter\BCD counter.txt
BCD counter
    

CodeBus www.codebus.net