Welcome！[Sign In] ！[Sign Up]！
Front-page it | Collect it | [中国-简体中文]
FAQ Fav
Location:
Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
Title: check Download
 Description: This a detector, the function is the sequence of " 1111" of the input signal which can be detected vhdl procedures.
 Downloaders recently: [More information of uploader 仝侨]
 To Search:
File list (Check if you may need any files): 
 

check.doc

CodeBus www.codebus.net