sobel2\addr_gen.v
......\arbiter.v
......\bmp_bin.exe
......\bmp_dat.txt
......\bmp_process.exe
......\compute.v
......\cpu.v
......\machine.v
......\memory.v
......\modelsim.ini
......\post_dat1.txt
......\post_process_dat.txt
......\read_bmp.exe
......\sobel.bmp
......\sobel.v
......\sobel_rslt1.bmp
......\sobel_slave.v
......\testbench.v
......\testdo.txt
......\vsim.wlf
......\work\@_opt\vopt0xbb1q
......\....\.....\vopt1tew3i
......\....\.....\vopt2qhd6d
......\....\.....\vopt3h0aaz
......\....\.....\vopt4e3vct
......\....\.....\vopt5b6cfm
......\....\.....\vopt65m8j7
......\....\.....\vopt72rsm2
......\....\.....\vopt8ztarx
......\....\.....\vopt9s97wf
......\....\.....\voptancrya
......\....\.....\voptbgvk2x
......\....\.....\voptbjf916
......\....\.....\voptcdy55r
......\....\.....\voptda1q7j
......\....\.....\vopte4gjb5
......\....\.....\vopte748ae
......\....\.....\voptf1j4e0
......\....\.....\voptgymmgv
......\....\.....\vopthr4ikd
......\....\.....\vopthvr6jn
......\....\.....\voptim73q8
......\....\.....\voptjiaks3
......\....\.....\voptkcsgxm
......\....\.....\voptkfd5wy
......\....\.....\voptm9w10h
......\....\.....\voptn6zi2c
......\....\.....\voptq0ef6y
......\....\.....\voptq32457
......\....\.....\voptrxg09s
......\....\.....\voptstjhbk
......\....\.....\vopttk2ef6
......\....\.....\vopttqn2ef
......\....\.....\voptvh5zh1
......\....\.....\voptwe8gkw
......\....\.....\voptx8qcre
......\....\.....\voptxbb1qq
......\....\.....\vopty5txt9
......\....\.....\voptz2xex4
......\....\.....\_deps
......\....\addr_gen\verilog.asm
......\....\........\verilog.rw
......\....\........\_primary.dat
......\....\........\_primary.dbs
......\....\........\_primary.vhd
......\....\.rbiter\verilog.asm
......\....\.......\verilog.rw
......\....\.......\_primary.dat
......\....\.......\_primary.dbs
......\....\.......\_primary.vhd
......\....\compute\verilog.asm
......\....\.......\verilog.rw
......\....\.......\_primary.dat
......\....\.......\_primary.dbs
......\....\.......\_primary.vhd
......\....\.pu\verilog.asm
......\....\...\verilog.rw
......\....\...\_primary.dat
......\....\...\_primary.dbs
......\....\...\_primary.vhd
......\....\machine\verilog.asm
......\....\.......\verilog.rw
......\....\.......\_primary.dat
......\....\.......\_primary.dbs
......\....\.......\_primary.vhd
......\....\.emory\verilog.asm
......\....\......\verilog.rw
......\....\......\_primary.dat
......\....\......\_primary.dbs
......\....\......\_primary.vhd
......\....\sobel\verilog.asm
......\....\.....\verilog.rw
......\....\.....\_primary.dat
......\....\.....\_primary.dbs
......\....\.....\_primary.vhd
......\....\....._slave\verilog.asm
......\....\...........\verilog.rw
......\....\...........\_primary.dat
......\....\...........\_primary.dbs
......\....\...........\_primary.vhd