Description: Black Gold FPGA development board (student) test procedures VHDL language, including the detection of serial lcd led key
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DEMO_V\db\prev_cmp_top_module.asm.qmsg
......\..\prev_cmp_top_module.fit.qmsg
......\..\prev_cmp_top_module.map.qmsg
......\..\prev_cmp_top_module.qmsg
......\..\prev_cmp_top_module.tan.qmsg
......\..\top_module.db_info
......\..\top_module.sld_design_entry.sci
......\..\top_module_global_asgn_op.abo
......\incremental_db\compiled_partitions\top_module.db_info
......\..............\...................\top_module.root_partition.cmp.atm
......\..............\...................\top_module.root_partition.cmp.dfp
......\..............\...................\top_module.root_partition.cmp.hdbx
......\..............\...................\top_module.root_partition.cmp.kpt
......\..............\...................\top_module.root_partition.cmp.logdb
......\..............\...................\top_module.root_partition.cmp.rcf
......\..............\...................\top_module.root_partition.map.atm
......\..............\...................\top_module.root_partition.map.dpi
......\..............\...................\top_module.root_partition.map.hdbx
......\..............\...................\top_module.root_partition.map.kpt
......\..............\README
......\led0_module.v
......\led0_module.v.bak
......\led1_module.v
......\led1_module.v.bak
......\led2_module.v
......\led2_module.v.bak
......\led3_module.v
......\led3_module.v.bak
......\top_module.asm.rpt
......\top_module.done
......\top_module.dpf
......\top_module.fit.rpt
......\top_module.fit.smsg
......\top_module.fit.summary
......\top_module.flow.rpt
......\top_module.map.rpt
......\top_module.map.summary
......\top_module.pin
......\top_module.pof
......\top_module.qpf
......\top_module.qsf
......\top_module.qws
......\top_module.sof
......\top_module.tan.rpt
......\top_module.tan.summary
......\top_module.v
......\top_module_assignment_defaults.qdf
......\incremental_db\compiled_partitions
......\db
......\incremental_db
DEMO_V