Description: Verilog code, modelsim simulation and download configuration based on EP2C5Q208C binary frequency
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File list (Check if you may need any files):
clk
...\clk.asm.rpt
...\clk.done
...\clk.eda.rpt
...\clk.fit.rpt
...\clk.fit.smsg
...\clk.fit.summary
...\clk.flow.rpt
...\clk.map.rpt
...\clk.map.summary
...\clk.pin
...\clk.pof
...\clk.qpf
...\clk.qsf
...\clk.sof
...\clk.sta.rpt
...\clk.sta.summary
...\clk.v
...\clk.v.bak
...\clk_nativelink_simulation.rpt
...\db
...\..\clk.amm.cdb
...\..\clk.asm.qmsg
...\..\clk.asm.rdb
...\..\clk.asm_labs.ddb
...\..\clk.cbx.xml
...\..\clk.cmp.bpm
...\..\clk.cmp.cdb
...\..\clk.cmp.hdb
...\..\clk.cmp.kpt
...\..\clk.cmp.logdb
...\..\clk.cmp.rdb
...\..\clk.cmp0.ddb
...\..\clk.cmp1.ddb
...\..\clk.cmp2.ddb
...\..\clk.cmp_merge.kpt
...\..\clk.db_info
...\..\clk.eda.qmsg
...\..\clk.fit.qmsg
...\..\clk.hier_info
...\..\clk.hif
...\..\clk.idb.cdb
...\..\clk.lpc.html
...\..\clk.lpc.rdb
...\..\clk.lpc.txt
...\..\clk.map.bpm
...\..\clk.map.cdb
...\..\clk.map.hdb
...\..\clk.map.kpt
...\..\clk.map.logdb
...\..\clk.map.qmsg
...\..\clk.map_bb.cdb
...\..\clk.map_bb.hdb
...\..\clk.map_bb.logdb
...\..\clk.pre_map.cdb
...\..\clk.pre_map.hdb
...\..\clk.rtlv.hdb
...\..\clk.rtlv_sg.cdb
...\..\clk.rtlv_sg_swap.cdb
...\..\clk.sgdiff.cdb
...\..\clk.sgdiff.hdb
...\..\clk.sld_design_entry.sci
...\..\clk.sld_design_entry_dsc.sci
...\..\clk.smart_action.txt
...\..\clk.sta.qmsg
...\..\clk.sta.rdb
...\..\clk.sta_cmp.8_slow.tdb
...\..\clk.syn_hier_info
...\..\clk.tis_db_list.ddb
...\..\clk.tmw_info
...\..\logic_util_heursitic.dat
...\..\prev_cmp_clk.qmsg
...\incremental_db
...\..............\README
...\..............\compiled_partitions
...\..............\...................\clk.db_info
...\..............\...................\clk.root_partition.cmp.cdb
...\..............\...................\clk.root_partition.cmp.dfp
...\..............\...................\clk.root_partition.cmp.hdb
...\..............\...................\clk.root_partition.cmp.kpt
...\..............\...................\clk.root_partition.cmp.logdb
...\..............\...................\clk.root_partition.cmp.rcfdb
...\..............\...................\clk.root_partition.map.cdb
...\..............\...................\clk.root_partition.map.dpi
...\..............\...................\clk.root_partition.map.hbdb.cdb
...\..............\...................\clk.root_partition.map.hbdb.hb_info
...\..............\...................\clk.root_partition.map.hbdb.hdb
...\..............\...................\clk.root_partition.map.hbdb.sig
...\..............\...................\clk.root_partition.map.hdb
...\..............\...................\clk.root_partition.map.kpt
...\simulation
...\..........\modelsim
...\..........\........\clk.sft
...\..........\........\clk.vo
...\..........\........\clk.vt
...\..........\........\clk.vt.bak
...\..........\........\clk_fast.vo
...\..........\........\clk_modelsim.xrf
...\..........\........\clk_run_msim_rtl_verilog.do
...\..........\........\clk_run_msim_rtl_verilog.do.bak