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Title: pci_verilog_target Download
 Description: This block is the Verilog source code for the Vantis 32 bit 33Mhz PCI Target Reference Design.
 Downloaders recently: [More information of uploader jack]
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pci_verilog_target
..................\base_addr_chk.v
..................\config_mux.v
..................\glue.v
..................\pargen.v
..................\pci_top.v
..................\rd1008.pdf
..................\retry_count.v
..................\state_machine.v
..................\tstbench
..................\........\bkend_daemon.v
..................\........\pci_clk_reset.v
..................\........\pci_stim.v
..................\........\pci_tb.v
..................\........\tasks.v
    

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