Welcome![Sign In][Sign Up]
Location:
Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
Title: Lab2_Part2 Download
 Description: converts a 4-bit binary code to 2-digital BCD code in verilog code. Implements on educational kit Altera MAX7000s EPM7128SLC84-7.
 Downloaders recently: [More information of uploader Henna Tan]
 To Search:
File list (Check if you may need any files):
 

Lab2_Part2\cmp_state.ini
..........\db
..........\..\lab2_part2.asm.qmsg
..........\..\lab2_part2.cmp.cdb
..........\..\lab2_part2.cmp.ddb
..........\..\lab2_part2.cmp.hdb
..........\..\lab2_part2.cmp.rdb
..........\..\lab2_part2.cmp.tdb
..........\..\lab2_part2.csf.qmsg
..........\..\lab2_part2.db_info
..........\..\lab2_part2.fit.qmsg
..........\..\lab2_part2.hif
..........\..\lab2_part2.lab2_part2.sld_design_entry.sci
..........\..\lab2_part2.map.cdb
..........\..\lab2_part2.map.hdb
..........\..\lab2_part2.map.qmsg
..........\..\lab2_part2.pre_map.hdb
..........\..\lab2_part2.project.hdb
..........\..\lab2_part2.rtlv.hdb
..........\..\lab2_part2.rtlv_sg.cdb
..........\..\lab2_part2.rtlv_sg_swap.cdb
..........\..\lab2_part2.sgdiff.cdb
..........\..\lab2_part2.sgdiff.hdb
..........\..\lab2_part2.tan.qmsg
..........\..\lab2_part2_cmp.qrpt
..........\..\lab2_part2_hier_info
..........\..\lab2_part2_syn_hier_info
..........\lab2_part2.asm.rpt
..........\lab2_part2.cdf
..........\lab2_part2.done
..........\lab2_part2.fit.eqn
..........\lab2_part2.fit.rpt
..........\lab2_part2.flow.rpt
..........\lab2_part2.map.eqn
..........\lab2_part2.map.rpt
..........\lab2_part2.pin
..........\lab2_part2.pof
..........\lab2_part2.qpf
..........\lab2_part2.qsf
..........\lab2_part2.qws
..........\lab2_part2.tan.rpt
..........\lab2_part2.tan.summary
..........\lab2_part2.v
..........\seg_digit.v
..........\seg_ten.v
    

CodeBus www.codebus.net