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Title: TEST-CPU-2 Download
 Description: VHDL language based on the microinstruction control of the CPU, 16-bit address lines
 Downloaders recently: [More information of uploader Zhiheng Shen]
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TEST CPU 2\TEST CPU\ACC.bsf
..........\........\ACC.vhd
..........\........\ACC.vhd.bak
..........\........\ALU.bsf
..........\........\ALU.vhd
..........\........\ALU.vhd.bak
..........\........\BR.bsf
..........\........\BR.vhd
..........\........\BR.vhd.bak
..........\........\CPU.asm.rpt
..........\........\CPU.bdf
..........\........\CPU.done
..........\........\CPU.fit.rpt
..........\........\CPU.fit.summary
..........\........\CPU.flow.rpt
..........\........\CPU.map.rpt
..........\........\CPU.map.summary
..........\........\CPU.mif_update.rpt
..........\........\CPU.pin
..........\........\CPU.pof
..........\........\CPU.qpf
..........\........\CPU.qsf
..........\........\CPU.qws
..........\........\CPU.sim.rpt
..........\........\CPU.sof
..........\........\CPU.tan.rpt
..........\........\CPU.tan.summary
..........\........\CPU.vwf
..........\........\CPU_assignment_defaults.qdf
..........\........\CU.bsf
..........\........\CU.vhd
..........\........\CU.vhd.bak
..........\........\db\add_sub_09h.tdf
..........\........\..\add_sub_alh.tdf
..........\........\..\add_sub_bah.tdf
..........\........\..\add_sub_blh.tdf
..........\........\..\add_sub_cah.tdf
..........\........\..\add_sub_dah.tdf
..........\........\..\add_sub_eah.tdf
..........\........\..\add_sub_fah.tdf
..........\........\..\add_sub_fnh.tdf
..........\........\..\add_sub_gah.tdf
..........\........\..\add_sub_gch.tdf
..........\........\..\add_sub_hah.tdf
..........\........\..\add_sub_iah.tdf
..........\........\..\add_sub_jah.tdf
..........\........\..\add_sub_kah.tdf
..........\........\..\add_sub_lah.tdf
..........\........\..\add_sub_mah.tdf
..........\........\..\add_sub_nah.tdf
..........\........\..\add_sub_oah.tdf
..........\........\..\CPU.asm.qmsg
..........\........\..\CPU.cbx.xml
..........\........\..\CPU.cmp.cdb
..........\........\..\CPU.cmp.hdb
..........\........\..\CPU.cmp.logdb
..........\........\..\CPU.cmp.rdb
..........\........\..\CPU.cmp.tdb
..........\........\..\CPU.cmp0.ddb
..........\........\..\CPU.dbp
..........\........\..\CPU.db_info
..........\........\..\CPU.eco.cdb
..........\........\..\CPU.eds_overflow
..........\........\..\CPU.fit.qmsg
..........\........\..\CPU.hier_info
..........\........\..\CPU.hif
..........\........\..\CPU.map.cdb
..........\........\..\CPU.map.hdb
..........\........\..\CPU.map.logdb
..........\........\..\CPU.map.qmsg
..........\........\..\CPU.mif_update.qmsg
..........\........\..\CPU.pre_map.cdb
..........\........\..\CPU.pre_map.hdb
..........\........\..\CPU.psp
..........\........\..\CPU.pss
..........\........\..\CPU.rtlv.hdb
..........\........\..\CPU.rtlv_sg.cdb
..........\........\..\CPU.rtlv_sg_swap.cdb
..........\........\..\CPU.sgdiff.cdb
..........\........\..\CPU.sgdiff.hdb
..........\........\..\CPU.sim.cvwf
..........\........\..\CPU.sim.hdb
..........\........\..\CPU.sim.qmsg
..........\........\..\CPU.sim.rdb
..........\........\..\CPU.sld_design_entry.sci
..........\........\..\CPU.sld_design_entry_dsc.sci
..........\........\..\CPU.syn_hier_info
..........\........\..\CPU.tan.qmsg
..........\........\..\CPU.tis_db_list.ddb
..........\........\..\mult_qc01.tdf
..........\........\..\mult_tj01.tdf
..........\........\..\mux_9fc.tdf
..........\........\..\prev_cmp_CPU.asm.qmsg
..........\........\..\prev_cmp_CPU.fit.qmsg
..........\........\..\prev_cmp_CPU.map.qmsg
..........\........\..\prev_cmp_CPU.mif_update.qmsg
..........\........\..\prev_cmp_CPU.qmsg
..........\........\..\prev_cmp_CPU.sim.qmsg
..........\........\..\prev_cmp_CPU.tan.qmsg
..........\........\..\wed.wsf
    

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