File list (Check if you may need any files):
verilog master files\axi_master.v
....................\axi_master_ic.v
....................\axi_master_ic_addr.v
....................\axi_master_ic_dec.v
....................\axi_master_ic_mstr_arbiter.v
....................\axi_master_ic_registry_resp.v
....................\axi_master_ic_registry_wr.v
....................\axi_master_ic_resp.v
....................\axi_master_ic_slv_arbiter.v
....................\axi_master_ic_wdata.v
....................\axi_master_single.v
....................\axi_master_stall.v
....................\prgen_fifo.v
....................\prgen_fifo_stub.v
....................\prgen_rand.v
verilog master files
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