源代码\C\avalon_lcd_regs.h
......\.\main.c
......\TestBench\altera_mf.v
......\.........\avalon_slave.v
......\.........\test_lcd_controller.v
......\.........\test_master.v
......\.........\test_time_engine.v
......\Verilog\Asyn_FIFO.v
......\.......\BG_FIFO.v
......\.......\BG_Layer.v
......\.......\data_fetcher.v
......\.......\FIFO_32to16.v
......\.......\LCD_controller_one_layer.v
......\.......\LCD_ONE_LAYER_TOP.v
......\.......\master.v
......\.......\NIOS_LCD.tcl
......\.......\PLL_cycloneii.v
......\.......\Register_slave.v
......\.......\Timing_Engine.v
......\C
......\TestBench
......\Verilog
源代码