Comparators_16B Verilog achieve optimization of 16

Title: Comparators_16B

Category:
VHDL-FPGA-Verilog
Tags:
[ASM] [源码]
File Size:
21.41kb
Update:
2008-10-13
Downloads:
0 Times
Uploaded by:
htgking

Description: Verilog achieve optimization of 16 compared with the output can be greater than, less than, equal to. Modular design, which can be expanded to 32

Downloaders recently: [More information of uploader htgking]

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