ddr_verilog_xilinx that the procedure was in Xilin - CodeBus

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Title: ddr_verilog_xilinx

Category:
VHDL-FPGA-Verilog
Tags:
[VHDL] [源码]
File Size:
22.86kb
Update:
2008-10-13
Downloads:
0 Times
Uploaded by:
fengwei12fw

Description: that the procedure was in Xilinx FPGA to achieve DDR_SDRAM interface, procedures used to write the language verylog

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