- Category:
- MiddleWare
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- File Size:
- 74.45kb
- Update:
- 2008-10-13
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- Uploaded by:
- stone168
Description: the CPLD or FPGA to achieve a very practical frequency circuit, as long as the input frequency, on the high precision
- [controlstepmotor] - stepper motor control, controllers, moto
- [ddfs] - my own use VHDL to achieve series dds, a
- [OthogoSig] - orthogonal signal source SCM and the cpl
- [dds123456WORD] - sinusoidal signal generator programs and
- [FPGA_27eg] - FPGA value of the 27 examples. Rar inclu
- [xdskjs] - On a commonly used in CNC circular inter
- [ad9851-1] - Dds generator ad9851vhdl classic paralle
- [test] - VHDL realize many times frequency multip
- [DPLL2] - All-digital phase-locked loop circuit de
- [phase_lock_vhdl] - To achieve phase-locked loop in the VHDL
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