Description: The full set of data ZXS6M XILINX FPGA development board, including user manuals, circuit schematics, lab manual, test code, etc., the circuit board is very wide, covering the common feature of all experiments Spartan6 chip for the novice who would like to know XILINX is a very good learning materials
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File list (Check if you may need any files):
TraininglabL1\Lab1\exp1_dcm\exp1_dcm.gise
.............\....\........\exp1_dcm.xise
.............\....\........\fuse.log
.............\....\........\fuse.xmsgs
.............\....\........\fuseRelaunch.cmd
.............\....\........\ipcore_dir\coregen.cgc
.............\....\........\..........\coregen.cgp
.............\....\........\..........\coregen.log
.............\....\........\..........\coregen.rsp
.............\....\........\..........\create_dcm_core.tcl
.............\....\........\..........\dcm_core\clk_wiz_v3_6_readme.txt
.............\....\........\..........\........\doc\clk_wiz_v3_6_readme.txt
.............\....\........\..........\........\...\clk_wiz_v3_6_vinfo.html
.............\....\........\..........\........\...\pg065_clk_wiz.pdf
.............\....\........\..........\........\example_design\dcm_core_exdes.ucf
.............\....\........\..........\........\..............\dcm_core_exdes.v
.............\....\........\..........\........\..............\dcm_core_exdes.xdc
.............\....\........\..........\........\implement\implement.bat
.............\....\........\..........\........\.........\implement.sh
.............\....\........\..........\........\.........\planAhead_ise.bat
.............\....\........\..........\........\.........\planAhead_ise.sh
.............\....\........\..........\........\.........\planAhead_ise.tcl
.............\....\........\..........\........\.........\planAhead_rdn.bat
.............\....\........\..........\........\.........\planAhead_rdn.sh
.............\....\........\..........\........\.........\planAhead_rdn.tcl
.............\....\........\..........\........\.........\xst.prj
.............\....\........\..........\........\.........\xst.scr
.............\....\........\..........\........\simulation\dcm_core_tb.v
.............\....\........\..........\........\..........\functional\simcmds.tcl
.............\....\........\..........\........\..........\..........\simulate_isim.bat
.............\....\........\..........\........\..........\..........\simulate_isim.sh
.............\....\........\..........\........\..........\..........\simulate_mti.bat
.............\....\........\..........\........\..........\..........\simulate_mti.do
.............\....\........\..........\........\..........\..........\simulate_mti.sh
.............\....\........\..........\........\..........\..........\simulate_ncsim.sh
.............\....\........\..........\........\..........\..........\simulate_vcs.sh
.............\....\........\..........\........\..........\..........\ucli_commands.key
.............\....\........\..........\........\..........\..........\vcs_session.tcl
.............\....\........\..........\........\..........\..........\wave.do
.............\....\........\..........\........\..........\..........\wave.sv
.............\....\........\..........\........\..........\timing\dcm_core_tb.v
.............\....\........\..........\........\..........\......\sdf_cmd_file
.............\....\........\..........\........\..........\......\simcmds.tcl
.............\....\........\..........\........\..........\......\simulate_isim.sh
.............\....\........\..........\........\..........\......\simulate_mti.bat
.............\....\........\..........\........\..........\......\simulate_mti.do
.............\....\........\..........\........\..........\......\simulate_mti.sh
.............\....\........\..........\........\..........\......\simulate_ncsim.sh
.............\....\........\..........\........\..........\......\simulate_vcs.sh
.............\....\........\..........\........\..........\......\ucli_commands.key
.............\....\........\..........\........\..........\......\vcs_session.tcl
.............\....\........\..........\........\..........\......\wave.do
.............\....\........\..........\dcm_core.asy
.............\....\........\..........\dcm_core.gise
.............\....\........\..........\dcm_core.sym
.............\....\........\..........\dcm_core.ucf
.............\....\........\..........\dcm_core.v
.............\....\........\....
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