Title:
lattice_ddr_verilog-for-orca4 Download
Description: The DDR controller source of Lattice (including simulation and documentation), DDR is MT46V16M8, Verilog
To Search:
File list (Check if you may need any files):
source\ddr_ctrl.v
......\ddr_data.v
......\ddr_par.v
......\ddr_pll_orca.v
......\ddr_pll_orca_sp.v
......\ddr_sig.v
......\ddr_top.v
testbench\ddr_tb.v
.........\stimulus.v
rd1020.pdf
source
testbench