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Title: ly4638_I2Cdesign Download
 Description: VHDL I2C protocol design, to achieve the display using I2C temperature sensor and implemented on FPGA.
 Downloaders recently: [More information of uploader 刘洋]
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ly4638_I2Cdesign\db\abs_divider_0dg.tdf
................\..\abs_divider_ibg.tdf
................\..\add_sub_unc.tdf
................\..\add_sub_vnc.tdf
................\..\altsyncram_ahc2.tdf
................\..\altsyncram_eam1.tdf
................\..\altsyncram_jam1.tdf
................\..\altsyncram_khc2.tdf
................\..\alt_u_div_l8f.tdf
................\..\alt_u_div_p5f.tdf
................\..\cmpr_ifc.tdf
................\..\cntr_hci.tdf
................\..\cntr_q6k.tdf
................\..\I2Cdesign.asm.qmsg
................\..\I2Cdesign.asm.rdb
................\..\I2Cdesign.asm_labs.ddb
................\..\I2Cdesign.cbx.xml
................\..\I2Cdesign.cmp.bpm
................\..\I2Cdesign.cmp.cbp
................\..\I2Cdesign.cmp.cdb
................\..\I2Cdesign.cmp.ecobp
................\..\I2Cdesign.cmp.hdb
................\..\I2Cdesign.cmp.kpt
................\..\I2Cdesign.cmp.logdb
................\..\I2Cdesign.cmp.rdb
................\..\I2Cdesign.cmp_merge.kpt
................\..\I2Cdesign.cuda_io_sim_cache.45um_ff_1200mv_0c_fast.hsd
................\..\I2Cdesign.cuda_io_sim_cache.45um_ii_1200mv_85c_slow.hsd
................\..\I2Cdesign.db_info
................\..\I2Cdesign.eco.cdb
................\..\I2Cdesign.eds_overflow
................\..\I2Cdesign.fit.qmsg
................\..\I2Cdesign.hier_info
................\..\I2Cdesign.hif
................\..\I2Cdesign.lpc.html
................\..\I2Cdesign.lpc.rdb
................\..\I2Cdesign.lpc.txt
................\..\I2Cdesign.map.bpm
................\..\I2Cdesign.map.cdb
................\..\I2Cdesign.map.ecobp
................\..\I2Cdesign.map.hdb
................\..\I2Cdesign.map.kpt
................\..\I2Cdesign.map.logdb
................\..\I2Cdesign.map.qmsg
................\..\I2Cdesign.map_bb.cdb
................\..\I2Cdesign.map_bb.hdb
................\..\I2Cdesign.map_bb.logdb
................\..\I2Cdesign.pre_map.cdb
................\..\I2Cdesign.pre_map.hdb
................\..\I2Cdesign.root_partition.sta_sgate.tdb
................\..\I2Cdesign.rpp.qmsg
................\..\I2Cdesign.rtlv.hdb
................\..\I2Cdesign.rtlv_sg.cdb
................\..\I2Cdesign.rtlv_sg_swap.cdb
................\..\I2Cdesign.sgate.rvd
................\..\I2Cdesign.sgate_sm.rvd
................\..\I2Cdesign.sgdiff.cdb
................\..\I2Cdesign.sgdiff.hdb
................\..\I2Cdesign.sim.hdb
................\..\I2Cdesign.sim.qmsg
................\..\I2Cdesign.sim.rdb
................\..\I2Cdesign.sim_ori.vwf
................\..\I2Cdesign.sld_design_entry.sci
................\..\I2Cdesign.sld_design_entry_dsc.sci
................\..\I2Cdesign.smart_action.txt
................\..\I2Cdesign.smp_dump.txt
................\..\I2Cdesign.sta.qmsg
................\..\I2Cdesign.sta.rdb
................\..\I2Cdesign.sta_cmp.7_slow_1200mv_85c.tdb
................\..\I2Cdesign.sta_sgate.tdb
................\..\I2Cdesign.syn_hier_info
................\..\I2Cdesign.tiscmp.fast_1200mv_0c.ddb
................\..\I2Cdesign.tiscmp.slow_1200mv_0c.ddb
................\..\I2Cdesign.tiscmp.slow_1200mv_85c.ddb
................\..\I2Cdesign.tis_db_list.ddb
................\..\I2Cdesign.tmw_info
................\..\logic_util_heursitic.dat
................\..\lpm_abs_7v9.tdf
................\..\lpm_abs_pt9.tdf
................\..\lpm_divide_evo.tdf
................\..\lpm_divide_voo.tdf
................\..\prev_cmp_I2Cdesign.asm.qmsg
................\..\prev_cmp_I2Cdesign.fit.qmsg
................\..\prev_cmp_I2Cdesign.map.qmsg
................\..\prev_cmp_I2Cdesign.qmsg
................\..\prev_cmp_I2Cdesign.sim.qmsg
................\..\prev_cmp_I2Cdesign.sta.qmsg
................\..\wed.wsf
................\fenpin_10.bsf
................\fenpin_10.vhd
................\fenpin_2.bsf
................\fenpin_2.vhd
................\fenpin_2.vhd.bak
................\fenpin_50.bsf
................\fenpin_50.vhd
................\fenpin_500.bsf
................\fenpin_500.vhd
................\fenpin_5000.bsf
................\fenpin_5000.vhd
................\fenpin_5000.vhd.bak
  

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