- Category:
- VHDL-FPGA-Verilog
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-
- File Size:
- 14kb
- Update:
- 2014-01-10
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- 成功
Description: EDK little busy recently a project with their own definition of a Create or Import Peripheral define the IP, in which to use the ISE IP. Troubled for some time! After the group, with the help of some friends on the forum and finally OK
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EDK_IP_ISE.docx
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