- Category:
- VHDL-FPGA-Verilog
- Tags:
-
- File Size:
- 2kb
- Update:
- 2015-05-17
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- Uploaded by:
- ljt
Description: Hello everyone, I am a graduate student at Fudan University. This resource is based on VHDL language of M bit by bit N divider. Where M/N, quotient M bits, the remainder is N bits. In Moim design verification and validation. Compression bag has a divider source files and testbench. May join the project, direct testing. I tests are error-free. After downloading Zunjia willing, positive comments, in order to facilitate mutual exchanges and learning. O (∩_∩) O Thank you. May 7, 2015 in Finland, Turku.
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任意M位除以N位_VHDL\division.vhd
...................\division_TB.VHD
任意M位除以N位_VHDL
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