Description: Verilog, syn_fifo, containing detailed instructions for synchronous FIFO TPRAM
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syn_fifo
........\db
........\..\gray2bin.db_info
........\..\gray2bin.eco.cdb
........\..\gray2bin.sld_design_entry.sci
........\..\prev_cmp_syn_fifo.map.qmsg
........\..\prev_cmp_syn_fifo.qmsg
........\..\syn_fifo.db_info
........\..\syn_fifo.eco.cdb
........\..\syn_fifo.sld_design_entry.sci
........\gray2bin.qsf
........\RTL
........\...\syn_fifo.jpg
........\...\syn_fifo.v
........\...\syn_fifo.v.bak
........\syn_fifo.done
........\syn_fifo.flow.rpt
........\syn_fifo.map.rpt
........\syn_fifo.map.summary
........\syn_fifo.qpf
........\syn_fifo.qpf.bak
........\syn_fifo.qsf
........\syn_fifo.qsf.bak
........\syn_fifo.qws
........\syn_fifo_assignment_defaults.qdf
........\详细设计方案
........\............\详细设计方案_syn_fifo.doc
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