- Category:
- VHDL-FPGA-Verilog
- Tags:
-
- File Size:
- 1kb
- Update:
- 2015-04-21
- Downloads:
- 0 Times
- Uploaded by:
- LP
Description: Each clock, counting time, achieve 8 scan display, turn on the digital tube display 13579BDF, can choose EDA experimental box, FPGA EP1C6Q240C8.
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scan_led.vhd
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