Description: Serial data stream and converts a variety of implementations, according to the sort and quantity of data requirements, you can choose a shift register, RAM or the like. For the relatively small amount of data design, it can be completed using a shift register serial to parallel converter the order of the provisions of the serial to parallel converter can be used to achieve case statement to determine for complex serial to parallel conversion, you can use state machine
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串并转换建模\rev_1\AutoConstraint_srl2pal.sdc
............\.....\rpt_srl2pal.areasrr
............\.....\rpt_srl2pal_areasrr.htm
............\.....\srl2pal.edf
............\.....\srl2pal.fse
............\.....\srl2pal.ncf
............\.....\srl2pal.srd
............\.....\srl2pal.srm
............\.....\srl2pal.srr
............\.....\srl2pal.srs
............\.....\srl2pal.tlg
............\.....\.yntmp\srl2pal.msg
............\.....\......\srl2pal.plg
............\.....\verif\srl2pal.vif
............\source\srl2pal.v
............\srl2pal.prd
............\srl2pal.prj
............\srl2pal.v
............\示例说明.doc
............\rev_1\par_1
............\.....\syntmp
............\.....\verif
............\rev_1
............\source
串并转换建模
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