- Category:
- VHDL-FPGA-Verilog
- Tags:
-
- File Size:
- 879kb
- Update:
- 2016-09-10
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- 0 Times
- Uploaded by:
- YL
Description: ISE developed by the FPGA engineering documents, display related, including video interface, using Verilog development, you can refer to learning
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ISE\bluesingleport.coe
...\bluesingleport.edn
...\bluesingleport_regamma.edn
...\bluesingleport_regamma.mif
...\bluesingleport_regamma.vhd
...\bluesingleport_regamma.xco
...\ctc_lut.edn
...\div.edn
...\div_cal.edn
...\div_wpm.edn
...\mulcaln.edn
...\mul_18.edn
...\mul_182.edn
...\mul_54.edn
...\mul_8x9.edn
...\mul_b.edn
...\mul_g.edn
...\mul_r.edn
...\redgreendualport.edn
...\redgreendualport_regamma.edn
...\redgreendualport_regamma.mif
...\redgreendualport_regamma.sym
...\redgreendualport_regamma.vhd
...\redgreendualport_regamma.xco
...\xapp928.ise
...\xapp928_demo_spi.mcs
...\xapp928_demo_xcf.mcs
...\XFPD_TOP_CHIPSCOPE.cdc
...\XFPD_TOP_CHIPSCOPE.cpj
...\xfpd_top_dvi_lvds_in_out.bit
...\yrgb_shift.edn
RTL\Color_temp\ctc_lut.vhd
...\..........\div.vhd
...\..........\div_cal.vhd
...\..........\div_wpm.vhd
...\..........\mulcaln.vhd
...\..........\MUL_8x9.vhd
...\..........\mul_b.vhd
...\..........\mul_g.vhd
...\..........\mul_r.vhd
...\..........\RGB_white_point_caln.vhd
...\..........\top_white_balance.vhd
...\..........\white_point_correction.vhd
...\..........\white_point_measnt.vhd
...\..........\yrgb_shift.vhd
...\.TC_PGC_IDE\CTC_PGC_IDE_COMP.vhd
...\Image_dither\cntrl_smc.vhd
...\............\dither_smc.vhd
...\............\Image_dither.vhd
...\............\Image_dither_data_types.vhd
...\LVDSTX\serdes_4b_7to1.vhd
...\......\serdes_4b_7to1_wrapper.vhd
...\......\top4_tx.vhd
...\PGC\bluesingleport.vhd
...\...\PGC.vhd
...\...\redgreendualport.vhd
...\TOP\XFPD_TOP_DVI_LVDS_IN_OUT.vhd
...\ucf\XFPD_TOP_DVI_LVDS_IN_OUT.ucf
...\Color_temp
...\CTC_PGC_IDE
...\Image_dither
...\LVDSTX
...\PGC
...\TOP
...\ucf
ISE
RTL